Enhancement In FPGA Using Moving Target Defence From Security Threats

Authors

  • Riyadh Al-Alwani, Murad Al-Helo, Saad Alwash

Abstract

Designing FPGA in a secure way is a challenging task, it is because the relationship between FPGA software/hardware providers and users is imbalance. Currently FPGA security mainly focuses on the reverse engineering on used FPGA design, analysing the authentication methods and code, or decoding the encryption present on the embedded memory from FPGA’s. In this research the security issues related with deployment of FPGA is addressed, This study investigate new scrutiny thread and explore the attack that can occur while deployment of FPGA. To address them, this study uses MDT technique (Moving Target defence) and a new FPGA oriented method, MTD is proposed – FOMTD. FOMTD is consist of 3 layers of defence. These are based on enhanced users constraint files, randomly selected design replica and runtime submodule assembling. It is observed that proposed method reduced the HW Trojan attack rate by 60% , while the power requirement for this task is increased by 10.84% from the baseline.

Published

2020-02-29

Issue

Section

Articles