Sensitizing Defects in Static Random Access Memory using Built-In Self-Test

Abstract

Memories have become an integral part of various applications, devices, and gadgets in all domains. Due to advanced submicron technology, faults may get generated in memories. The main cause for fault generation is process variations along with manufacturing imperfections like dopant variations. To reassure the proper operation of circuits, memories are required to be fault-tolerant. The designed circuit also needs to be sturdy for change in temperature and supply voltage variations. In this paper, the analysis of fault detection using the Built-In Self-Test (BIST) method is performed on 2KB of the memory designed. The static and dynamic faults can be detected with short time latency is observed. The testing performed for analysis is during runtime.