Power Efficient Adiabatic Quantum-Flux-Parametron (AQFP) Logic-based Circuits Using Reversible Logic Gates

Authors

  • N. Geetha Bhavani , Dr. K. Pushpa

Abstract

Now a day’s power consumption has become one of the limiting factors in great performance
CMOS technology based digital circuits and systems. Superconductor logic families, which are based on
Josephson junctions, are actively being pursued as an alternative to CMOS logic, as they operate with
extremely high-speed clocks and low power consumption. Adiabatic Quantum-Flux-Parametron (AQFP)
logic is one of the superconductor logics offering extremely high-energy efficiency for building high
performance computing systems. The power efficiency of these AQFP Logic circuits can be further
improved by implementing AQFP logic circuits using reversible logic gates. Currently, the JSIM tool is
used to verify AQFP- based analog circuit design. But for very large scale integration (VLSI) circuit
design of AQFP logic, lack of a logic simulation environment becomes an obstacle. So, a logic simulation
model has been created for simulation of AQFP circuits by developing a functional model based on the
Finite State Machine (FSM) approach using Hardware Description Language (HDL). By using this
approach, we implemented basic gates (AND, OR, NOT, and MAJORITY), KOGGESTONE adder, and
BRENTKUNG adder with AQFP logic and Reversible AQFP logic. The circuits are synthesized and
simulated by using XILINX ISE 14.5 tool and power calculations were done by the XPOWER analyzer
tool.

Published

2020-10-17

Issue

Section

Articles