Efficient VLSI Architecture using Machine Learning Algorithms

  • Mr. Arpit Yadav, Dr. Swapnil Jain


Machine learning (ML) provides the high end automation of data processing for the wide
range of human brain with machine interfacing. Deep machine learning (DML) performs like human
brain to achieve automated features extraction, reducing the dimension of the complex data set.
Analog signal processing (ASP) need much higher energy efficiency than digital signal processing
(DSP), presenting a way for overcoming of these limitations. This paper have reviewed ML
techniques which propose analogue memory which can be essential component for learning system.
VLSI architecture and circuits are discussed for k-mean clustering algorithm in analogue signal
processing. Discussed about unsupervised learning system for different computation node in DML.
In addition, also discussed about ultra-low-power circuit to provide similarity measures in analogue
signal processing and technique matched with latest development in VLSI, ULSI for CMOS
transistor with compact technology.. Moreover the compact technology node size of nanometer (nm)
VLSI design and complex fabrication have extreme high complexity which generates heavy
gigabytes data Such result helps in designing of VLSI architecture, lithography hotspot detection,
and also increases the dependability of physical design with face recognition. The face recognition
studied, based on Hidden Markov Models (HMMs) and discrete wavelet transform (DWT). A
sequence of overlapping sub-images is extracted from each face image computing the DWT
coefficients for each of them.