Lossless JPEG image compression based on FPGA

Abstract

- Recently, images became the dominant media material for transmitting or storing across different applications used by different people. So, there was a serious need for finding more effective and efficient image compression techniques to reduce the big size of such multimedia files. This paper proposes lossless JPEG image compression and decompression system based on FPGA. Generally, the proposed system consists of a software side and a hardware side. In the software side, the digital image file is prepared to be processed by the hardware side. The hardware side is proposed to be consists of two main processing circuits which are the prediction circuit for calculating the predicted value of each pixel in the image and the encoding circuit that was represented by a modified RLE (Run-Length-Encoder) to encode the result obtained through subtracting the predicted value from the real value for each pixel to produce the final compressed image file. The compression ratio obtained for the proposed system was equal to 1.7487, while the maximum data throughput that obtained was 71.718 MP/s.